LLVM 12 arrives with x86, AArch optimizations

Update to the compiler infrastructure platform also brings improvements to the build script and Intermediate Representation.

LLVM 12 arrives with x86, AArch optimizations

LLVM 12, the latest release of the open source LLVM compiler infrastructure platform, published April 14, features optimizations for the x86 target as well as changes to the AArch64 Arm back end.

For the x86 target, a new function attribute, tune-cpu, has been added to support -mtune like GCC, allowing microarchitectural optimizations to be applied independently from the target-cpu attribute or TargetMachine CPU, which will be used to select the instruction set. If this attribute is not present, the tune CPU will follow the target CPU. Also for the x86 target, the assembler now supports {disp32} and {disp8} pseudo prefixes to control displacement size for memory operands and jump placements.

For the AArch64 Arm back end, improvements have been made to Windows unwind data generation, with unwind data optimized and written in packed form wherever possible, reducing the size of unwind data by roughly 60 percent compared to LLVM 11. Generation of prologs/epilogs is tweaked when targeting Windows, to boost the chances of being able to use the packed unwind info format.

In another change in LLVM 12, the internal llvm-build Python build script and associated LLVMBuild.text files describing the LLVM component structure have been removed, replaced by a pure CMake approach. With this change, each component stores extra properties in the created targets, with the properties processed once all components are defined to resolve library dependencies and produce the header expected by llvm-config.

Other new features and improvements in LLVM 12:

  • Improvements to the LLVM IR (Intermediate Representation) include the addition of a byref attribute to better represent argument passing for the amdgpu_kernel calling convention and the addition of a type parameter to the sret attribute, to continue work on removing point element types.
  • The llvm.experimental.vector.reduce family of instrinsics has been renamed, dropping “experimental” from the name to reflect being supported in IR.
  • The integer sanitizer -fsanitize=integer now has a new sanitizer, -fsanitize=unsigned-shift-base. It is not undefined behavior for an unsigned left shift to overflow, but it has been the source of bugs and exploits in certain codebases.
  • Changes have been made to the PowerPC target including support for Epilogue Vectorization.

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