AMD and Intel bake virtualization into chips

Performance increases when software doesn't have to do all the heavy lifting

Hardware-assisted virtualization, now available from both AMD and Intel, is not a breakthrough but the beginning of one. AMD’s SVM (Secure Virtual Machine) and Intel’s VT (Virtualization Technology) signal a sea change in CPU design assumptions and the architectures that result.

AMD and Intel set out to solve the same problem and ended up with similar, yet unique solutions. The problem? The enormous overhead imposed by software virtualization by a backward CPU architecture. The solution? Let the CPU take on the heavy lifting.

The first step taken by both chipmakers was to equip their CPUs with the capability to intercept and redirect requests to alter the system’s state. In the one machine/one OS model, the operating system is trusted to alter, unchecked, the state of the CPU, chip set, and peripherals. That’s an obvious barrier to efficient virtualization; guest OS instances would crash if their system changes, however irresponsible, didn’t stick. Keeping up the charade of a one-owner system is the expensive part of virtualization.

The big fix that’s needed is to ensure that no operating system can alter the system’s state in a way that impedes sharing the computer with other OSes. Software alters system state through the execution of privileged instructions. Identifying and redirecting these are among software virtualization’s ugliest jobs, and that’s what AMD and Intel chose to take on first.

With an OS running atop SVM or VT, any privileged operation can be intercepted before completion and directed to an entry point set up by the hypervisor, the “supervisor’s supervisor,” which becomes the only holder and grantor of the privilege to alter system state. For example, when a guest’s request to map a segment of virtual memory is intercepted, hypervisor code fulfills that request by handing over a segment of memory already set aside for that guest.

Such privileged operations occur hundreds or thousands of times each second on a virtualized server, and as you can imagine, it’s horribly messy when done in software. Intel and AMD wired privileged instruction intercepts into their CPUs and rolled the saving and restoring of extended system state (OS instance context, if you will) into new instructions. There is more to VT and SVM than that, but intercepts and context are the biggies.

AMD plays its AMD64 architecture to substantial advantage; in particular, the CPUs’ on-board memory controllers. Intel’s memory controller is external to the CPU and thus is unaware of VT. AMD64’s on-board memory controllers have been updated to maintain nested paging, which gives each guest instance its own memory address translation table. Intel’s architecture requires that guest memory address translation be done in software.

There are other differences between the implementations, with AMD’s being a substantial superset of Intel’s. Initially, however, virtualization solutions that enable hardware acceleration will target the overlap between the two implementations. This will produce modest benefits. Later on, we’ll see products specially written to take advantage of AMD64’s enhancements.

Copyright © 2006 IDG Communications, Inc.