Optical chip interconnect specification weighed

San Jose, Calif. -- Optical technology is being eyed as a way to boost communications between chips in multiprocessor systems and will be the subject of a proposed specification to be submitted to a standards consortium later this year, an official of Primarion said at the Platform Conference here on Tuesday.

The Tempe, Ariz.-based optical data communications systems company plans to make a proposal for an optical-enabled HyerpTransport specification to the HyperTransport Technology Consortium later in 2003, said Brian Wong, vice president of marketing and business development at Primarion.

Primarion is pursuing development of optical interfaces that would connect chips to boost efficiency in multiprocessor systems, Wong said. "The main goal is, once you're in the optical bandwidth, scalability is very easy," Wong said, after a session at the conference.

Eventually, optical technology could be extended to link different systems, he added. HyperTransport technology enables point-to-point high-speed data exchange between integrated circuits on chips.

In other developments revealed at the Platform Conference Tuesday morning:

* A PCI-SIG (Special Interest Group) official said a compliance checklist list for PCI Express, a pure, serial-type interconnect specification, is due from the PCI-SIG this spring.

* Gabriele Sartori, director of strategic alliances at AMD, said the company's 64-bit Hammer technology will be in the marketplace "pretty soon." Hammer offers advantages in that 32-bit applications can continue running on 64-bit operating systems with no problems, Sartori said.