AMD boosts transistor speed with metal gates

Advanced Micro Devices  has developed two sets of next-generation transistors using different approaches that produce higher levels of performance than conventional transistors, the company said at the VLSI Symposia in Kyoto, Japan, Thursday.

The company demonstrated how the use of nickel silicide metal gates could be combined with strained silicon transistors and with the silicon-on-insulator (SOI) technology used in developing AMD's latest eighth-generation Opteron processor to increase performance. The two approaches improve the performance of the new transistors by as much as 30 percent over older transistors, said Craig Sander, vice president of technical development at AMD.

SOI technology adds an insulating material around the channel that current flows through in a transistor, reducing current leakage into the silicon surrounding the transistor. This reduces the power requirements of the transistor and can increase performance, Sander said.

In the experimental transistors, AMD used a technique called fully depleted SOI (FDSOI), which allows the transistor gate to control more of the body of the transistor. With conventional SOI techniques, a charge can build up in the body of the transistor, the area where the gate turns the transistor on or off as current is applied. FDSOI tightens the gate's control over the body and clearly separates the transistor body from the rest of the channel.

In a presentation at the conference, AMD showed how it combined FDSOI transistors with metal gates built from nickel silicide to increase the performance of those transistors by as much as 30 percent over other published results, Sander said. The metal gate construction allows the gate dielectrics to appear thinner to the current than dielectrics on conventional polysilicon gates, so more current can flow through the gate without AMD having to actually change the size of the gate, he said. The thinner a gate is, or appears, the more current can flow through it.

AMD also showed the results of its work combining nickel silicide gates and strained silicon manufacturing techniques, Sander said. Strained silicon is formed by depositing a layer of silicon germanium on top of regular silicon. The atoms in the silicon layer attempt to align with the atoms in the silicon germanium layer, creating an opening that improves the flow of current in between the two layers.

The Sunnyvale, Calif., company achieved a greater increase in performance than it had expected from the combination of metal gates and strained silicon, Sander said.

The VLSI Symposia brings the world's leading semiconductor companies together to discuss new and innovative manufacturing and design techniques. Intel and IBM, among others, also presented papers this week at the conference.