BANGALORE, INDIA - SiNett's recently released unified access chip for integrated wireless and wired networks can improve performance, manageability and cost of ownership of such networks for enterprise users, according to a company executive. The company, however, may encounter competition from vendors that are trying to achieve the same goal, but with different methods, analysts say.
SiNett's design integrates on a single chip wireless and wired packet processing, switching, security, mobility and traffic management, and can be deployed in unified access edge switches, WLAN (wireless LAN) switches and WLAN appliances, according to Shiri Kadambi, president and chief executive officer of SiNett, a networking silicon design startup in Sunnyvale, California.
Systems built using SiNett's chips are likely to have a system bill-of-materials that is about one-third to one-fourth of the cost of current implementations, Kadambi said.
Current network equipment, which addresses unified access requirements, uses a "ping-pong architecture" that processes the packet in a number of hops across a number of devices, including a switch, a security processor and a network processor, each with their own buffer, according to Kadambi. "You end up doing multiple copies and references to buffers and tables at each stage, which increases latency, and brings down performance," he added.
SiNett announced last week two versions of its OneEdge unified access chip. The SN5024 edge-switch processor is designed for integrated wired and wireless edge switches, while the SN6004 controller is optimized for use in WLAN appliances that centralize wireless access management at the data center level. "We support unification both at the network level, and at the port level," Kadambi said.
It is only incrementally harder for SiNett to support both the core and the edge of the network, and as a startup they cannot afford to pass up either opportunity, according to Joseph Byrne, semiconductor analyst at Gartner, a Stamford, Connecticut-based research and consulting company.
A one-chip solution removes the need for a separate crypto accelerator, and the cost savings may be as high as 50 percent depending on the configuration, Byrne said. A single chip, purpose-built solution also keeps more traffic in the fast, hard-wired path, and the performance benefits could start to become noticeable if the switch is heavily loaded and the wireless links are carrying latency-sensitive traffic such as voice, Byrne added.
The SiNett chip architecture uses a hardware pipeline to do wired and wireless packet processing, in-line decryption and network processing functions in one pass, according to Kadambi. "We have stitched in the decryption and parsing for example in the ingress engine, and reduced the number of stores of the packet to one," he said. The result is a performance of over 8G bps (bits per second) full duplex, in contrast to 500M bps to about 2G bps in unified access implementations that use the multiple hop, ping-pong architecture, according to Kadambi.
A key element of SiNett's strategy has been to implement its chip in a combination of hardware and software, with an eye to improving flexibility while configuring the system. It has also provided on the chip four processor cores from MIPS Technologies for implementing user specific functions.