See correction below.
Toshiba Corp. has developed a new chip production technology that increases by 50 percent the number of layers of components that can be crammed inside a standard Multi Chip Package (MCP) for use in products such as cellular telephones and personal digital assistants (PDAs), the company said Wednesday.
MCP technology allows several chips to be stacked on top of each other and enclosed in a single package. It's widely used in cellular telephones because of the need to keep the total size of the phone small. Manufacturers in Japan have standardized around an MCP that is 1.4 millimeters high.
The new technology allows for the stacking of up to nine chips inside an MCP that meets phone maker specifications, said Junichi Nagaki, a spokesman for Toshiba in Tokyo. The company is claiming a first for the technology. Until now Toshiba's most advanced technology had enabled up to six chips to be stacked.
The increase was made possible by improved mounting technology and an advance in chip manufacturing technology that has reduced the thickness of chips from 85 microns to 70 microns, said Nagaki.
For users of cellular telephones and other small-size portable electronics the technology could enable manufacturers to produce smaller devices, because chips can be consolidated into single packages, or to produce more feature-rich and powerful products, because additional memory and other components can be added at no sacrifice to size.
Toshiba has already begun sample production of such chips and plans to begin mass production in May this year, said Nagaki.
Its sample combines four type of memory separated by three spacers: an 8Mbit SRAM (static RAM) chip, a 128Mbit SDRAM (synchronous DRAM) chip, three 128Mbit NOR flash chips and a single 128Mbit NAND flash memory chip. The new MCP also includes three memory buses so that memory can be connected with the processor at a speed which matches the memory type.
Correction:Due to a reporting error, this story as originally posted incorrectly stated the measurement unit for the thickness of the chip layers. The correct unit is microns.
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