February 04, 2008

Intel lifts veil on Silverthorne processor

Early reports on Intel's first x86 chip designed specifically for portable computers say Silverthorne will be single-core processor with 512KB cache, a 533MHz front-side bus

Intel will offer a first look at technical details of its low-power Silverthorne processor during a presentation at the International Solid State Circuits Conference (ISSCC) this week, setting the stage for a concerted push into the market for ultraportable devices.

"This is the first detailed technical presentation on Silverthorne," said Justin Rattner, Intel's chief technology officer and director of the company's Corporate Technology Group.

Silverthorne is the first x86 chip designed by Intel specifically for small, portable computers. Until now, the company has taken older processors originally designed for notebooks and adapted them for use in portable devices. For example, Intel's existing A100 and A110 processors designed for these devices are based on the Celeron M chip.

Intel's ISSCC presentation on Silverthorne was anticipated. The conference program contained a presentation abstract that described an unnamed 45-nanometer, low-power Intel processor designed for mobile Internet devices. That description is the same that Intel used to describe Silverthorne, although the company earlier declined to confirm or deny if the chip was, in fact, Silverthorne.

Unlike other processors in Intel's current product line, Silverthorne uses an in-order processor design, akin to a factory with a single assembly line capable of processing one operation at a time. The chip is the first in-order processor released by Intel since it began shipping the Pentium Pro in 1995. Other Intel processors use an out-of-order design.

Out-of-order chips work like a factory with multiple assembly lines. They can process several operations at the same time and generally offer better performance than in-order processors. Silverthorne will make up some of this difference by using Hyper-Threading, a technology that allows the processor to work on two instruction threads at the same time.

Using an in-order design for Silverthorne struck the best balance between performance and power efficiency, Intel said. But don't expect Silverthorne to match the performance available from Intel's mobile Core 2 processors, even though Silverthorne consumes less power. The performance of the new chips will be roughly equivalent to the Pentium M processors found in the first version of Centrino, released in 2003, Rattner said.

Intel declined to comment on what clock speed Silverthorne will run at or how much power it will consume when it hits the market in the coming months. But the ISSCC program abstract said the chip will have 512KB of cache and use a 533MHz front-side bus.

Observers had expected Intel to offer dual- and single-core versions of Silverthorne, but Rattner said Silverthorne will have one core.

Over the life of the Silverthorne processor, Intel expects to make a 2GHz chip available and plans to offer a version that consumes 1 watt, Intel said, suggesting these will not be features of the processors set for release in the months ahead.

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