Sun's newest UltraSPARC CPU goes multi-socket in the SPARC Enterprise T5240 server
Ever since Sun introduced the eight-core Niagara CPU a few years ago, the company has been the nominal leader in cores per socket. With the introduction of the Niagara 2 (known as the T2), Sun upped the ante, addressing some of the flaws in the Niagara 1, and pushing even more smarts onto the CPU die. Now, with the introduction of the T5240, they're doubling it up. 
[ Read Paul Venezia's review of the eight-core, single-CPU Sun SPARC Enterprise T5120. ]
Sun introduced the T5240 today, showcasing the 2U, dual-CPU system as the next step in SPARC-based server evolution. I've had a T5240 in the lab for a few days now, and will be writing a full review of the unit soon, but for now, I'll stick to the highlights.
As with all recent server designs from Sun, the SPARC Enterprise T5240 leverages existing chassis and disk designs, looking much like the Intel-based Sun Fire X4450. This consistency is notable in allowing for some re-use of parts such as SAS drives between servers with different architectures.
Inside, however, the T5240 is completely different. The basis of the T2 CPU is a multi-core, "System on a Chip" design that places 4MB L2 cache per core, FPUs, memory controllers, 10G Ethernet, and hardware crypto smarts right on the CPU die, streamlining access to these resources. In the T5240, there are not one, but two T2 CPUs on the mainboard, joined by a central bus. This central bus is built with Sun's own ZAMBEZI chips, which the company refers to as a coherence hub, though hub might be a bit of a misnomer if compared to Ethernet switches and hubs.
Regardless, this bus or hub is the central point of contact between CPUs. Each CPU has four connections to the hub, each running at 6.7GB per second in both directions, providing an aggregate of 26.8GB per second per CPU in each direction. There have been some sacrifices made in the multi-CPU design, however, such as moving the 10G Ethernet controllers off the die, and reducing memory bandwidth per CPU (though aggregate bandwidth among all CPUs is higher than the Niagara 2 single-CPU layout).
In short, the T5240 brings as many as 128 threads (16 cores at 8 threads per core) and as much as 128GB RAM into a 2U rack server with 16 2.5-inch SAS slots, four gigabit Ethernet ports, 10G capability, and more. Suffice it to say, it’ll be an interesting few weeks in the lab. Stay tuned.
Posted by Paul Venezia on April 9, 2008 12:00 PM
