Anobit claims that, unlike competitors such as Intel and Micron, the MSP technology lets it use any consumer-grade NAND flash in its devices, allowing it to offer a lower price-per-gigabyte. Intel and Micron use what's known as eMLC or "enterprise-class MLC" flash, which is higher quality but commands a 20 percent price premium, according to analysts.
Anobit, however, doesn't release pricing as its products are sold directly to system manufacturers, who in turn set the price for the SSDs.
"You're either using a more advanced controller with consumer grade NAND or your leveraging enterprise-class NAND. Anobit's approach is to use the cheapest NAND they can find and then use their more advanced controller technology," said Jeff Janukowicz, a research director at IDC.
Anobit is not alone among SSD processor makers who can extend MLC NAND's reliability. For example, Sandforce makes a processor that uses data compression and RAID architecture to get around the limitations of MLC.
Sandforce uses "24-bit/512-byte ECC hard coding," said Gregory Wong, an analyst with Forward Insights. "However, the fundamental issue is that the signal quality is declining, and Anobit's technology helps to get a 'cleaner' signal."
The overhead for hardware-based signal decoding is relatively high, with some NAND flash vendors allocating up to 7.5 percent of the flash chip as spare area for ECC. Increasing the ECC hardware decoding capability not only increases the overhead further, but the effectiveness declines with NAND's decreasing signal-to-noise ratio, Wong said.
Manufacturers over time have been able to shrink the geometric size of the circuitry that makes up NAND flash technology from 90 nanometers a few years ago to between 25nm and 34nm today. The process of laying out the circuitry is known as lithography.
The smaller the lithography process is, the more data that can fit on a single NAND flash chip. At 25nm, the cells in silicon are 3,000 times thinner than a strand of human hair. But as geometry shrinks, so too does the thickness of the walls that make up the cells that store bits of data. As the walls become thinner, more electrical interference, or "noise," can pass between them, potentially creating more data errors. The amount of noise compared to the data that can be read by a NAND flash controller is known as the signal-to-noise ratio.
In order to fix data errors, manufacturers include error-correction code in their NAND flash. The higher the bit-error rates, the more ECC is required. Simply put, Anobit's processor is able to continue to read data for a longer period of time compared with typical NAND flash with hard-coded ECC, which takes up flash capacity.
Wong said Anobit is the first company to commercialize its signal-processing technology, which uses software in the controller to increase the signal-to-noise ratio, making it possible to continue reading data even as electrical interference rises.
Lucas Mearian covers storage, disaster recovery and business continuity, financial services infrastructure and health care IT for Computerworld. Follow Lucas on Twitter at @lucasmearian or subscribe to Lucas's RSS feed. His email address is firstname.lastname@example.org.
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