HP brings value to Itanium servers

Who says the Itanium 2 processor is dead? Certainly not Hewlett-Packard, which has introduced a strong dual-processor server, the Integrity rx1620-2, into its enterprise lineup. HP, a co-inventor and longtime supporter of the processor, has done a fine job with the server, using a less-expensive version of the chip to keep costs down and leveraging much of its mass-market engineering capabilities from its ProLiant systems to provide solid management and respectable high-availability and scalability features.

The Itanium 2 processor may not be sexy or have mass-market appeal, but the 64-bit processor from Intel plays a significant role in high-performance computing. The processor's strength is that it drives massively scalable servers far beyond the capabilities of today's x86 processors, and its RISC architecture is clean and efficient, particularly for multithreaded database processing, transactions systems, and floating-point math applications such as simulation, modeling, and BI.

Considering that Intel laid out an aggressive road map for the Itanium family at its Developer Forum in March, the processor architecture certainly seems like a safe bet. And if you're looking at Itanium 2 on a tight budget, the Integrity rx1620-2, although not perfectly equipped, is a safe bet for an entry-level server.

Less Cache, Less Cost

The 1U rack-mounted Integrity rx1620-2 is similar to other dual-processor entry-level servers such as HP's Xeon-based equivalent, the ProLiant DL360 G4. The Integrity system supports one or two Itanium processors, both part of the family code-named Fanwood by Intel. These chips, available at 1.3GHz and 1.6GHz, were initially targeted at high-end engineering workstations, not servers. As such, they don't scale beyond two-way multiprocessing, which is unsuitable for bigger servers but ideal for this type of server.

The system HP provided had two 1.6GHz processors with a dual-channel bus that handles 533 mtps (millions of transfers per second). That corresponds to a 267MHz front-side bus. (Although that's slower than the 800MHz front-side bus on a high-end Xeon system, those numbers aren't directly comparable.) The dual-channel design of the memory bus, implemented by HP's own zx1 chip set, means that the system performs two separate memory operations per clock tick, each from its own memory bank. It's an efficient design for this architecture.

The Fanwood processors used in this server also contain 3MB of on-chip cache, essential for feeding the instruction bundles that are part of the Itanium 2 architecture. (The slower 1.3GHz processors also have 3MB of cache.) Unfortunately, that's the best this server offers, and it falls short of state of the art. For example, Intel's higher-end Madison family of Itanium 2 processors comes with 4MB, 6MB, or 9MB of on-chip cache. HP's rx2620 server, which is a 2U, four-drive version of the rx1620, supports the much-costlier 6MB-cache chips. Other HP models use the 9MB-cache processors.

IBM and Sun have also stolen a march on the single-core Itanium 2. Sun's UltraSparc IV and IBM's Power5 chips, which are architecturally comparable to the Itanium 2, are shipping in dual-core versions today. So although the Fanwood processors let HP keep the price down and present an entry-level offering, the rx1620-2's per-chip performance lags behind other RISC systems.