What sealed the deal, however, was that mobile device makers needed to design their own ASICs intended to power specific devices -- and realized it worked better to integrate a CPU into those ASICs rather than soldering a CPU alongside.
Enter ARM and its CPU-for-hire business model. Want to mix a CPU in with the other ingredients of your new ASIC or SoC? ARM has your recipe. Like few other companies at that time, ARM was willing to let customers bake its CPU into their own devices.
From there it was all momentum. Once ARM gained a toehold in the mobile market, others followed. As with PCs, servers, and most processor-based systems, later products were based on the same processor family as the earlier products. After all, why switch? If the previous generation worked, make the next generation similar but faster. Gutting a design and starting over with a new CPU family, including new software and new development tools, is a surefire career killer.
ARM's efficiency edge
The fact that ARM's CPU architecture was comparatively simple made it a good choice for integration. A more complicated CPU would've been difficult for outsiders to get right -- and might not work.
Imagine a skilled but inexperienced engineer trying to fabricate his first Pentium processor based on nothing more than schematics. How well do you suppose that would work? The early ARM designs, in contrast, used static timing and simple clock trees, and they had no dynamic state. The entire CPU could be stopped dead (0 MHz) and still work when it sped back up. That was a huge boon for ASIC designers trying to concentrate on their own logic, not someone else's.
ARM uses a RISC architecture for its chips. RISC is perceived as more modern, more elegant, and more appropriate for new designs than CISC. But the differences today are more semantic than technical. RISC was supposed to be a streamlined, stripped-down approach to CPU design. Jettison all those messy old instructions you're not using, the thinking goes, and what's left is a lean, mean computing machine.
The original RISC designs were indeed very Spartan. That stopped almost immediately. Little by little, RISC processors like MIPS and SPARC started clawing back many of the features they'd eschewed earlier. (Hardware multipliers? Gosh, maybe that's a good idea, after all.) ARM, like most other RISC-inspired designs of its day, started out simple and gradually grew more complex. Still, it's cleaner and neater than the barnacle-encrusted hull of the Good Ship X86.
As it turns out, few anticipated the real payoff of this simpler design: lower power consumption. Contrary to popular belief, RISC processors are neither faster nor slower than their doddering CISC forebears. But they are generally more power-efficient, which turns out to be a key differentiator when you're making battery-powered gizmos.
It's tough to compare one CPU circuit design to another, but roughly speaking, an ARM design has about one-third the number of transistors of an x86 design. That's leaving out the likes of cache and bus interfaces, which can easily consume more transistors than the CPU "core" itself. Indeed, most processors today -- RISC or CISC -- are about three-quarters cache, with a little CPU core lurking in one corner of the chip.
ARM can get away with slashing its transistor budget because it doesn't support as many architectural features as x86. It has a smaller repertoire of functions -- a smaller assembly-language vocabulary, so to speak. Intel chips can handle BCD-encoded numbers; ARM does binary only. Intel has a built-in loop counter; ARM relies on software-defined loops. Intel enforces and defends boundaries on code, data, and stack segments, and can automatically trap accidental (or malicious) violations. ARM processors have nothing like that.