Not long after arriving in New York on a red-eye flight, Pat Gelsinger, senior vice president and general manager of Intel
Corp.'s Digital Enterprise Group, showed no signs of exhaustion during an interview after the launch of Intel's new 'Woodcrest' chip. Gelsinger excitedly scribbled diagrams on a sketch pad illustrating advances in the dual-core Xeon processor, the first
chip based on Intel's Core microarchitecture, and animatedly expounded on why he thinks the microarchitecture will help Intel
win back share lost to rival Advanced Micro Devices Inc. Gelsinger also touched on the upcoming launch of systems based on
Intel's next-generation Itaninum 'Montecito' chip and weighed in on some of the challenges ahead for multicore processing.
Following are selected excerpts from that interview.
IDGNS: What are you personally most proud of with the launch of 'Woodcrest'?
Gelsinger: The Core microarchitecture that's at the heart of Woodcrest is not the performance king like the 486 was for its
day, it's not the platform king like the Pentium Pro was in its day, this is the energy efficient king. It really is this
incredibly well-tuned machine of trade-offs of power and performance.
IDGNS: What could you have done better with 'Woodcrest'?
Gelsinger: The FB-DIMMs'. [fully buffered dual inline memory modules] power was over budget, and that was disappointing. So
this tremendously good processor is making up for a bit of weakness in the power of the [FB-DIMMs'] subsystem. We'll get it
fixed in subsequent revisions ... but that was disappointing this time around that we didn't do a bit better job there.
IDGNS: What makes you so assured you'll gain back market share lost to AMD over the past couple years?
Gelsinger: Since the beginning of the year, we have been aggressively seeding the platform with customers. We have 3,000 of
these things out in the marketplace today, and the responses from OEMs, ISVs, SIs and end users has been nothing but spectacular...
Fundamentally, I think there's pent-up demand, we expect to see a very rapid product ramp as a result.
IDGNS: You've said in the past that AMD's integrated memory controller is over-hyped, yet you've also said you plan to add
an integrated memory controller to your own future chips. Can you clarify that for me?
Gelsinger: We've never said the integrated memory controller is bad, but it is severely overhyped today ... Our cache is twice
as effective as theirs, so that means I go to memory half as often. So independent of anything else if I'm going to memory
half as much, who cares how long it takes to get to memory? Plus, the other aspect of their design is they have this view
of local memory and remote memory. So if you're running an operating system, half the time you are local and half the time
you are remote. Guess what, when you are remote, I have to go here and then go here. The time to get over there is actually
equal to the time for us to get to our memory.
IDGNS: So are you still planning to add the integrated memory controller to future chips?
Gelsinger: Eventually, we're looking at that as an engineering trade-off, and we'll probably make that part of our product
line in the future. Why? Because we can. Not that it's bad, but it's not some big deal, or big architectural delta, it's simply
an engineering trade-off that particularly as the cache continues to get larger and larger it's probably a good thing to add
to it, as it doesn't hurt.