Infineon Technologies continues to shed areas of business the German chip maker no longer views as core to its memory chip
production.
On Thursday, the company announced the sale of its development activities in the area of wearable electronics to Interactive
Wear, in Wessling,Germany.
Infineon had conducted research on the integration of electronic functions into textiles and developed the technology to the
point that it is ready for the market. The company decided to discontinue this work as part of its restructuring and concentration
on its core memory chip business, the Munich-based manufacturer said in a statement.
On Monday, Siemens said it is taking over the electrochemical biochip development activities of Infineon. The transfer to
Siemens involves patents, a high-tech biochip lab and researchers.
In between these two divestments, Infineon squeezed in news about its core memory chip business.
The German government selected Infineon, together with Koninklijke Philips Electronics, to deliver contactless secure chips
for new passports containing biometric data, Infineon said Thursday.
The new passports, valid for 10 years, will include an embedded chip that will initially store a digital photo of the passport
holder's face. Starting in March 2007, the holder's left and right index fingerprints will also be stored on the chip.
Also, Infineon and its partner Nanya Technology said they are now ready to begin producing DRAM (dynamic RAM) chips based
on 90-nanometer process technology that was jointly developed at Infineon's research center in Dresden, Germany, the manufacturers
announced jointly on Thursday. Both companies have already qualified the 90-nanometer products at major customers and achieved
validation from Intel Corp.
Process structures of 90 nanometers further reduce chip size compared to the previous 110-nanometer technology, thereby increasing
potential chip output per wafer by more than 30 percent. Infineon and Nanya expect the productivity increase from shrinking
the chip size combined with the use of 300 millimeter wafers to result in a significant reduction in production costs per
chip.
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