Sony, IBM, and Toshiba reveal more plans for Cell chip

The four companies developing the Cell microprocessor released a few more details about the chip on Monday -- and with them a surprise: first generation versions of the device won't be built on a cutting edge production technology into which the companies have sunk billions of dollars, but on a technology already in widespread use today.

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Sony, Sony Computer Entertainment Inc. (SCEI), IBM, and Toshiba have been developing the chip since 2001 and are positioning it as the engine that will drive future multimedia and home entertainment products. The chip is best known for the place it will take in SCEI's successor to its PlayStation 2 games console, but the companies are planning to use the chip in products such as high-definition televisions and home servers, they also said Monday.

Samples of the Cell chip will begin rolling off production lines in the first half of 2005, appearing in Sony and Toshiba products in 2006. SCEI confirmed the chip's place in its new games console Monday but gave no production schedule.

Early versions of the chip will be built using a 90-nanometer production process, similar to that used by Sony for the processors inside the PlayStation 2 and by other companies such as Intel for some of its fastest microprocessors. The 90 nm measurement refers to the size of the smallest feature on a chip's surface. The smaller features mean semiconductors can be made physically smaller because everything can be made to take up less space, or more powerful because more can be crammed into a given space.

For the past few years the four companies have been investing heavily in developing 65 nm production technology. Sony and SCEI have invested ¥200 billion ($1.9 billion) in a three-year joint project to lead the development.

While plans remain firm for test production of the 65 nm technology in the first half of next year, it won't be mature enough to match the plans for product commercialization, the companies said Monday.

"We have always been trying to find out the best scenario, the best process technology to be implemented at the time (of commercialization), and it has been decided that the 90-nanometer process will be most suitable for the first generation (chips)," said Yoshiko Furusawa, a spokeswoman for SCEI in Tokyo.

The four companies have been fairly guarded about the progress of the chip's development but said Monday that they plan to disclose details of the Cell in four papers that will be presented at the International Solid State Circuits Conference (ISSCC) in San Francisco in February.

The chip will be a multicore 64-bit Power processor with multithreading and the ability to support multiple operating systems simultaneously, according to provisional details released Monday. It will offer a "substantial" bandwidth on the bus between the chip and main memory and other chips, a flexible I/O system, real-time resource management, and on-chip hardware support for protecting intellectual property.