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FALL IDF: Intel readies 8-core, 16-core Itanium 2

Expected to outperform "Madison" chip

By Robert McMillan, IDG News Service
September 17, 2003
 

SAN JOSE, CALIF. - Intel Corp.'s much-anticipated multicore processor, code-named Tanglewood, will contain eight processor cores when it ships, sources close to the chip maker revealed on Wednesday.

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The processor is expected to ship in 2006, a year after Intel's first dual-core Itanium, code-named Montecito, the sources said. It will be followed by a 16-core processor, they added.

Intel's dual-core processors are being designed by a group of former Alpha processor developers who were transferred to Intel as part of a 2001 agreement that saw hundreds of developers move to the Santa Clara chip maker from Compaq Computer Corp. These chips will be based on Intel's new 90-nanometer fabrication process and will use the Vanderpool partitioning technology that Intel announced on Tuesday.

Intel has been reluctant to reveal many details about Tanglewood. To date, the company has confirmed only that the processor exists, that it will contain more than two processor cores and that it is expected to have more than seven times the performance of Intel's current "Madison" Itanium processors.

Keynoting at the Intel Developer Forum here on Thursday, Mike Fister, the manager of Intel's Enterprise Products Group, declined to give specifics on Tanglewood's processor cores. "I'm not going to tell you how many more than two. It's a lot more than two," he said.

Intel has promoted Itanium as an alternative to RISC (Reduced Instruction Set Computer) processors such as Sun Microsystems Inc.'s UltraSPARC and IBM Corp.'s Power chips, but the processor has yet to be significantly adopted outside of the realm of high-performance computing, (HPC) according to Gordon Haff, an analyst with Nashua, N.H., research company Illuminata Inc. "Intel's not even really pretending it's being used outside of the HPC space at this point," he said.

Wednesday's keynote, which featured videotaped testimony from HPC Itanium users at Sandia National Laboratories and Lawrence Livermore National Laboratory, did little to dispel that impression. The one Itanium user who made a live appearance at Wednesday's keynote was Intel's own Enterprise Business Group CIO, Sandra Morris, who said that the company is using the 64-bit processors to run an inventory application.

Industry partners are continuing to support Itanium, which will have 700 "production ready" applications ported to it by year's end, Fister said. He also ran a video of Susan Whitney, the general manager of IBM Corp.'s xSeries group, announcing plans to introduce a 16-way Itanium 2 system during the same time frame.

For its part, Intel is readying an Itanium-based blade server, which is planned as the third addition to its Intel Server Compute Blade line, Fister said. He showed the first system in this new product line, the dual Xeon processor SBXL52, during his keynote, saying that a four-way Xeon system would follow "in another few months or so." The Itanium blade will follow that, Fister said.

Intel expects to sign up more than 15 manufacturers and systems integrators to sell its blade systems by year's end. The company has already signed up five companies, including Bull SA, Ciara Technologies Inc. and Promicro Systems Inc., Intel said.

Later in the keynote, Fister unveiled a new software framework designed to make it easier for system vendors to develop and port BIOS (Basic Input Output System) components. Called the Intel Platform Innovation Framework for Extensible Firmware Interface, the technology will be handed over to a special interest group that will manage its development some time in the next quarter, according to Intel.

The framework, which is expected to take four to five years before it is widely adopted, will speed up driver development for Intel systems because it uses the C programming language, Fister said.





 

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