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IBM adds multithreading to Power 5

Company touts 40 percent boost in performance

By Ed Scannell
August 22, 2003
 

Building on the technology it introduced with its Power 4 processor, IBM last week announced it will incorporate simultaneous multithreading into its upcoming 64-bit Power 5 processor. With its Power 4 chip, IBM was able to significantly improve performance by incorporating two microprocessor cores on the same dye. The Power 5 also packs two cores on a dye, but each chip will be able to handle two threads simultaneously, increasing performance by 40 percent over its predecessor.

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"This technique makes the chip a virtual four-way server for applications that are built to take advantage of multithreading. We designed a lot more of the resources into this chip that you need to have two instruction streams on a single microprocessor," said Mark Papermaster, director of IBM's Server Processor Design.

The trick, however, will be to get corporate and third-party developers to redesign their software to take advantage of the chip's multithreading capability, as well as its new "thread-switching" capability, which can dynamically switch any chip over to single-thread mode.

The upcoming chip, now being system-tested on IBM's AIX and OS/400 server operating systems as well as Linux, is expected to roll out in the summer of 2004, according to Papermaster. IBM plans to do a scaled-down version of the chip that will be offered to its server and desktop business partners, including Apple Computer.





 


 
Ed Scannell is an editor at large at InfoWorld.
 

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